发明名称 |
SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF |
摘要 |
PURPOSE: A semiconductor package and a fabrication method thereof are provided to improve the accuracy of die attach with the low cost die attach device by using the self aligning property by the surface tension of a solder layer. CONSTITUTION: A pad is formed on the top of a semiconductor chip(201) to electrically connect with the external circuit. A thin metal layer(204) is formed on the bottom of the semiconductor. A thin solder layer(205) is formed on a bonding position(203) of the top of a substrate(202). The semiconductor chip and the substrate are die attached by bonding of the metal layer and the solder layer.
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申请公布号 |
KR20100127370(A) |
申请公布日期 |
2010.12.06 |
申请号 |
KR20090045791 |
申请日期 |
2009.05.26 |
申请人 |
NEPES CO., LTD. |
发明人 |
JUNG, GI JO;JEON, BYOUNG YOOL |
分类号 |
H01L23/34 |
主分类号 |
H01L23/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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