发明名称 Processed wafer via
摘要 An apparatus involves a semiconductor wafer that has been back-end processed, the semiconductor wafer including a substrate, electronic devices and multiple metalization layers, a via extending from an outer surface of the substrate through the substrate to a metalization layer from among the multiple metalization layers, and an electrically conductive material within the via, the electrically conductive material forming an electrically conductive path from the metalization layer to the outer surface. A method of processing a semiconductor wafer that has been front-end and back-end processed involves forming a via in the semiconductor wafer extending from a surface of the wafer, into and through semiconductor material, to a metalization layer formed during the back-end processing by etching the semiconductor wafer; and making the via electrically conductive so as to form an electrical path within the via extending from the surface of the wafer to the metalization layer.
申请公布号 US7808111(B2) 申请公布日期 2010.10.05
申请号 US20060556747 申请日期 2006.11.06
申请人 发明人 TREZZA JOHN
分类号 H01L23/52 主分类号 H01L23/52
代理机构 代理人
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