发明名称 Method for fabricating semiconductor device and semiconductor device
摘要 An n-channel MOS transistor and a p-channel MOS transistor are formed on a semiconductor substrate 100. The p-channel MOS transistor includes a gate electrode 102a, a first offset sidewall 103a formed on side surfaces of the gate electrode 102a so as to contain fine particles 110 of group IV semiconductor therein. The n-channel MOS transistor includes a gate electrode 102b and a second offset sidewall 103b formed on side surfaces of the gate electrode 102b. After ion implantation of group IV semiconductor, heat treatment is performed to form the fine particles 110, so that a thickness of the first offset sidewall 103a can be made larger than a thickness of the second offset sidewall 103b.
申请公布号 US7808001(B2) 申请公布日期 2010.10.05
申请号 US20070808448 申请日期 2007.06.11
申请人 PANASONIC CORPORATION 发明人 TAKEOKA SHINJI
分类号 H01L21/00 主分类号 H01L21/00
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