发明名称 |
Tri-gate field-effect transistors formed by aspect ratio trapping |
摘要 |
Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.
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申请公布号 |
US7799592(B2) |
申请公布日期 |
2010.09.21 |
申请号 |
US20070861931 |
申请日期 |
2007.09.26 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
LOCHTEFELD ANTHONY J. |
分类号 |
H01L21/00 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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