发明名称 |
Method for manufacturing semiconductor device with planer gate electrode and trench gate electrode |
摘要 |
A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.
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申请公布号 |
US7799667(B2) |
申请公布日期 |
2010.09.21 |
申请号 |
US20080219008 |
申请日期 |
2008.07.15 |
申请人 |
DENSO CORPORATION |
发明人 |
SHIRAKI SATOSHI;NAKAYAMA YOSHIAKI;MIZUNO SHOJI;NAKANO TAKASHI;YAMADA AKIRA |
分类号 |
H01L21/336;H01L21/76;H01L21/763;H01L21/8234;H01L27/08;H01L29/10;H01L29/423;H01L29/78;H01L29/786 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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