发明名称 System and method for addressing errors in a multiple-chip memory device
摘要 A multiple-chip memory device, comprising: a volatile memory element configured to store a plurality of bits of information, and later access the plurality of bits of information; a non-volatile memory element configured to store initial repair information identifying one or more errors in the volatile memory element; and a master memory controller configured to read the initial repair information, and to provide processed repair information and volatile memory control signals to the volatile memory element, wherein the volatile memory element is configured to store and access the plurality of bits of information based on the processed repair information and logical address information.
申请公布号 US7802133(B2) 申请公布日期 2010.09.21
申请号 US20070819759 申请日期 2007.06.29
申请人 QIMONDA NORTH AMERICA CORP. 发明人 LEE KOONHEE;PATTERSON RYAN;RYU HOON;NIERLE KLAUS
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
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