CLOCK GENERATING CIRCUIT, POWER SUPPLY SYSTEM AND CLOCK SIGNAL FREQUENCY CHANGING METHOD

摘要

PROBLEM TO BE SOLVED: To provide a clock generating circuit that reduces a noise level of unwanted radiation while suppressing expansion in circuit scale, and to provide a power supply system and a clock signal frequency changing method. SOLUTION: A frequency divider circuit 30 frequency-divides a clock signal CLK generated by a clock generator to produce first to third frequency-divided signals Sb1-Sb3 and outputs them to a pulse control unit 31. On the basis of the first to third frequency-divided signals Sb1-Sb3 from the frequency divider circuit 30, the pulse control unit 31 turns on/turns off a fifth transistor Tr5 and a sixth transistor Tr6 of a current control unit 32 to make a first regulating current Ia1 to flow into a node N1 of the clock generator or to pull in a second regulating current Ia2 from the node N1. COPYRIGHT: (C)2011,JPO&INPIT