发明名称 MEMORY CONTROL CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To achieve power saving as a system without deteriorating access efficiency of respective memory devices. <P>SOLUTION: The memory control circuit includes a command queue holding a plurality of memory access commands, and a plurality of chip selects controlling a plurality of memory devices. The memory control circuit includes a power saving control means shifting the memory devices to a power saving mode for each chip select. When an access command to a memory device as a target is input to the command queue, the power saving control means starts a process to recover the memory device from the power saving mode. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2010286899(A) 申请公布日期 2010.12.24
申请号 JP20090138339 申请日期 2009.06.09
申请人 CANON INC 发明人 UEDA KOICHI
分类号 G06F12/06;G06F1/32 主分类号 G06F12/06
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