发明名称 |
MEMORY DEVICE FOR HIERARCHICAL MEMORY ARCHITECTURE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory device for a hierarchical memory architecture that solves the problem of current microprocessors where the data transaction between the CPU and/or core logic and system memory becomes the bottleneck of system performance. <P>SOLUTION: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a tree structure with other memories. Standard non-hierarchical memory devices can also be attached to the output port of the hierarchical memory device. <P>COPYRIGHT: (C)2011,JPO&INPIT |
申请公布号 |
JP2010287203(A) |
申请公布日期 |
2010.12.24 |
申请号 |
JP20090217985 |
申请日期 |
2009.08.28 |
申请人 |
EILERT SEAN;LEINWANDER MARK |
发明人 |
EILERT SEAN;LEINWANDER MARK |
分类号 |
G06F3/06;G06F12/00 |
主分类号 |
G06F3/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|