发明名称 Nonvolatile semiconductor memory system
摘要 According to one embodiment, an electrical package includes: an external input portion; an external output portion; a plurality of integrated circuits that is compatible with a compressed deterministic pattern test, each of the integrated circuits including: an input portion; a decompressor that is connected to the input portion; scan chains that are connected to the decompressor; a compactor that is connected to the scan chains; a selector that is connected to the compactor and the input portion to selectively output an output of the compactor or an output of the input portion; and an output portion that is connected to the selector.
申请公布号 US7890823(B2) 申请公布日期 2011.02.15
申请号 US20080120538 申请日期 2008.05.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ANZOU KENICHI
分类号 G01R31/3177;G01R31/40 主分类号 G01R31/3177
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