发明名称 Halt context switching method and system
摘要 In a processing pipeline having a plurality of units, an interface unit is provided between a first, upstream pipeline unit that needs to be drained prior to a context switch and a second, downstream pipeline unit that might halt prior to a context switch. The interface unit redirects data that are drained from the first pipeline unit and to be received by the second pipeline unit, to a buffer memory provided in the front end of the processing pipeline. The contents of the buffer memory are subsequently dumped into memory reserved for the context that is being stored. When the processing pipeline is restored with this context, the data that were dumped into memory are retrieved back into the buffer memory and provided to the interface unit. The interface unit receives these commands and directs them to the second pipeline unit.
申请公布号 US7916146(B1) 申请公布日期 2011.03.29
申请号 US20050292471 申请日期 2005.12.02
申请人 NVIDIA CORPORATION 发明人 KELLER ROBERT C.;SHEBANOW MICHAEL C.;DHARMAPURIKAR MAKARAND M.
分类号 G06T1/20 主分类号 G06T1/20
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