发明名称 |
Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode |
摘要 |
A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.
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申请公布号 |
US2011127586(A1) |
申请公布日期 |
2011.06.02 |
申请号 |
US20100799810 |
申请日期 |
2010.04.30 |
申请人 |
BOBDE MADHUR;GUAN LINGPENG;BHALLA ANUP;YILMAZ HAMZA |
发明人 |
BOBDE MADHUR;GUAN LINGPENG;BHALLA ANUP;YILMAZ HAMZA |
分类号 |
H01L27/06;H01L21/8232 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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