| 摘要 |
The invention relates according to a first aspect to a device (1) for reconstructing a clock signal from a baseband serial signal (NRZ-D), comprising: —a pulse generating circuit (2) adapted for generating pulses at each transition, rising or falling, of the baseband serial signal (NRZ-D); —a phase-locked loop (5) comprising a voltage-controlled oscillator (6) which generates an oscillator output signal (VCO-S) and a filter (7) delivering a setpoint signal (VCO-E) to the oscillator (6), the phase-locked loop (5) furthermore comprising a breaker (8) interposed between the oscillator (6) and the filter (7), the switching of which is controlled by the output (Cde-S) of the pulse generating circuit (2), and in that the filter (7) is a low-pass filter, such that: —in the presence of a pulse generated by the pulse generating circuit (2), the breaker (8) is closed and the filter (7) then averages the oscillator output signal (VCO-S) passing through the breaker so as to deliver the setpoint signal (VCO-E) to the oscillator; —in the absence of a pulse generated by the pulse generating circuit (2) the breaker (8) is open and the filter (7) then stores a signal of constant level so as to deliver the setpoint signal (VCO-E) to the oscillator; the device being characterized in that it furthermore comprises a decision flip-flop (9) making it possible to resynchronize the baseband serial signal by copying said signal at each falling edge of the oscillator output signal (VCO-S). |
