发明名称 BUS CONTROL UNIT AND MICROCOMPUTER
摘要 PROBLEM TO BE SOLVED: To allow actual measurement of a worst value of spec of a microcomputer including a CPU and a peripheral unit which asynchronously operate. SOLUTION: The peripheral unit 150 outputs a retrial request signal RT1 for requesting resending of data until processing corresponding to access from the CPU 102 is completed. An FF 116 outputs a strobe request signal SR when latching a second retrial request signal RT2 in timing of a strobe signal ST1. A bus control circuit 112 and a strobe signal generation circuit 114 perform sending of the data and the strobe signal ST1 when receiving the strobe request signal SR from the FF 116 to perform the resending. A retrial frequency control part 120 stops output of the second retrial request signal RT2 to the flip-flop 116 when the resending at the final time out of the preset prescribed number of times is decided. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011150420(A) 申请公布日期 2011.08.04
申请号 JP20100009224 申请日期 2010.01.19
申请人 RENESAS ELECTRONICS CORP 发明人 MOTOIZUMI TAKASHI
分类号 G06F13/42 主分类号 G06F13/42
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