发明名称 Display device and method for transmitting clock signal during blank period
摘要 A display device includes a data line, a timing controller configured to apply a transmission signal corresponding to data bits to a data line during an active period in which the data bits are transmitted and apply a transmission clock signal to the data line during a blank period in which the data bits are not transmitted, and a data driver configured to sample the transmission signal (hereinafter, a reception signal) applied through the data line to recover the data bits and drive a display panel according to the recovered data bits. The display device can transmit a clock signal through the data line during the blank period.
申请公布号 US8094147(B2) 申请公布日期 2012.01.10
申请号 US20090408434 申请日期 2009.03.20
申请人 LEE YONG-JAE;ANAPASS INC. 发明人 LEE YONG-JAE
分类号 G09G5/00 主分类号 G09G5/00
代理机构 代理人
主权项
地址