发明名称 DEFECT ANALYSIS METHOD OF SEMICONDUCTOR DEVICE
摘要 A defect analysis method of semiconductor device, wherein defect percentage data for each of inspection units within a wafer and information pieces regarding manufacturing conditions for the wafer are loaded into a computer; statistical testing of the defect percentage data with respect to the manufacturing conditions is performed using the computer; and results of the statistical testing are collected for each of the information pieces on the manufacturing conditions and outputted from the computer.
申请公布号 US2012029679(A1) 申请公布日期 2012.02.02
申请号 US201113177127 申请日期 2011.07.06
申请人 MATSUSHITA HIROSHI;KABUSHIKI KAISHA TOSHIBA 发明人 MATSUSHITA HIROSHI
分类号 G06F19/00 主分类号 G06F19/00
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