发明名称 |
Address control circuit and semiconductor memory device |
摘要 |
An address control circuit is presented for use in reducing a skew in a write operation mode. The address control circuit includes a read column address control circuit and a write column address control circuit. The read column address control circuit is configured to generate a read column address from an address during a first burst period for a read operation mode. The write column address control circuit is configured to generate a write column address from the address during a second burst period for a write operation mode.
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申请公布号 |
US8358558(B2) |
申请公布日期 |
2013.01.22 |
申请号 |
US20100824882 |
申请日期 |
2010.06.28 |
申请人 |
HYNIX SEMICONDUCTOR INC.;LEE KYONG HA;LEE JOO HYEON |
发明人 |
LEE KYONG HA;LEE JOO HYEON |
分类号 |
G11C8/00 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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