| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a time difference amplification circuit that implements a reduced time difference offset. <P>SOLUTION: A time difference amplification circuit 100 comprising a multistage connection of a plurality of time difference amplifiers each of which includes: a first time difference amplifier TDA1 having a first positive input terminal 1a, a first negative input terminal 1b, a first positive output terminal 1c, and a first negative output terminal 1d; and a second time difference amplifier TDA2 having a second positive input terminal 2a, a second negative input terminal 2b, a second positive output terminal 2c, and a second negative output terminal 2d, and receiving the input of output signals of the first time difference amplifier, includes: a selection circuit 10a having a first selection element S1 for connecting first or fourth wiring I1 and I4 to the second positive input terminal 2a, and a second selection element S2 for connecting second or third wiring I2 and I3 to the second negative input terminal 2b; and a control circuit 50 for controlling the selection circuit 10a. <P>COPYRIGHT: (C)2013,JPO&INPIT |
