发明名称 |
A/D CONVERSION CIRCUIT, SOLID-STATE IMAGE SENSOR, AND CAMERA SYSTEM |
摘要 |
An A/D conversion circuit in which a counter is made to be capable of performing counting at both edges of a clock, up/down count values can be switched while the up/down count values are held, and the duty of the counting operation is difficult to be distorted even with the both-edge counting, a solid-state image sensor, and a camera system.
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申请公布号 |
US2013147999(A1) |
申请公布日期 |
2013.06.13 |
申请号 |
US201213672252 |
申请日期 |
2012.11.08 |
申请人 |
SONY CORPORATION;SONY CORPORATION |
发明人 |
HISAMATSU YASUAKI |
分类号 |
H04N5/363;H03M1/12;H03M1/56;H04N5/335;H04N5/374;H04N5/376;H04N5/378 |
主分类号 |
H04N5/363 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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