发明名称 PROCESSOR SIMULATION ENVIRONMENT
摘要 In a method of simulating a processor system by running code that simulates the system on a host processor, code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two or more different code dictionaries: the translated instructions are mapped to multiple and different dictionaries dependent on the execution privilege level or mode of the simulated processor. If an instruction is encountered during runtime that changes the mode of the processor the code dictionary is switched to use the dictionary associated with the new mode. The different modes require different instruction mappings to the native instruction set of the host using different models that more accurately represent the behaviour of the system code and hardware in the system being simulated.
申请公布号 US2013173887(A1) 申请公布日期 2013.07.04
申请号 US201313770243 申请日期 2013.02.19
申请人 IMPERAS SOFTWARE LTD.;IMPERAS SOFTWARE LTD. 发明人 KENNEY JAMES;DAVIDMANN SIMON
分类号 G06F9/30 主分类号 G06F9/30
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