发明名称 PHASE-LOCKED LOOP WITH TWO NEGATIVE FEEDBACK LOOPS
摘要 A phase-locked loop with two negative feedback loops including: a phase frequency detector which includes phase difference between the input clock and the feedback clock in a frequency-phase-locked loop and outputting up or down signals based on the phase difference; a charge pump outputting the current proportional to the up and down signals outputted from the phase frequency detector; a loop filter outputting the voltage by filtering the current outputted from the charge pump; a voltage controlled oscillator outputting the frequency based on the voltage outputted from the loop filter; a divider dividing the frequency outputted from the voltage controlled oscillator and feedbacking to the phase frequency detector; a frequency-voltage converter generating the voltage corresponding to the frequency outputted from the voltage controlled oscillator, and suppressing noise of the voltage controlled oscillator by feedbacking the generated voltage to the voltage controlled oscillator.
申请公布号 US2013187689(A1) 申请公布日期 2013.07.25
申请号 US201213353477 申请日期 2012.01.19
申请人 CHOI YOUNG SHIG 发明人 CHOI YOUNG SHIG
分类号 H03L7/08 主分类号 H03L7/08
代理机构 代理人
主权项
地址