发明名称 |
PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME |
摘要 |
A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure.
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申请公布号 |
US2013187269(A1) |
申请公布日期 |
2013.07.25 |
申请号 |
US201213427787 |
申请日期 |
2012.03.22 |
申请人 |
LIN HUNG-JEN;WANG TSUNG-DING;LEE CHIEN-HSIUN;LU WEN-HSIUNG;CHENG MING-DA;LIU CHUNG-SHI;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
LIN HUNG-JEN;WANG TSUNG-DING;LEE CHIEN-HSIUN;LU WEN-HSIUNG;CHENG MING-DA;LIU CHUNG-SHI |
分类号 |
H01L23/498;H01L21/56 |
主分类号 |
H01L23/498 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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