发明名称 |
PROCEDE DE REALISATION D'UNE TRANCHEE D'ISOLATION DANS UN SUBSTRAT SEMI-CONDUCTEUR, ET STRUCTURE, EN PARTICULIER CAPTEUR D'IMAGE CMOS, OBTENUE PAR LEDIT PROCEDE |
摘要 |
<p>An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench including an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the active area and the encapsulation layer including nitrogen or carbon.</p> |
申请公布号 |
FR2978612(B1) |
申请公布日期 |
2013.08.16 |
申请号 |
FR20110056861 |
申请日期 |
2011.07.27 |
申请人 |
STMICROELECTRONICS (CROLLES 2) SAS |
发明人 |
FAVENNEC LAURENT;TOURNIER ARNAUD;ROY FRANCOIS |
分类号 |
H01L21/762;H01L27/146 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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