发明名称 Signal transmission circuit for increasing soft error tolerance
摘要 A CAD device according to the embodiments includes means that determines signal transmission time of each signal transmission circuit in an LSI circuit, means that determines an output inversion rate of a flip-flop circuit included in each signal transmission circuit when the flip-flop circuit is exposed to radiation, means that determines a signal transmission circuit that is a critical path, means that calculates a total soft error rate of the LSI circuit on the basis of the signal transmission time, the output inversion rate, and a clock period, and means that, when a predetermined soft error rate is less than the total soft error rate of the LSI circuit as a result of comparison, reducing the total soft error rate of the LSI circuit to the extent possible without changing signal transmission time of the signal transmission circuit, which is a critical path.
申请公布号 US8561006(B2) 申请公布日期 2013.10.15
申请号 US20080053886 申请日期 2008.03.24
申请人 UEMURA TAIKI;TOSAKA YOSHIHARU;FUJITSU SEMICONDUCTOR LIMITED 发明人 UEMURA TAIKI;TOSAKA YOSHIHARU
分类号 G06F17/50 主分类号 G06F17/50
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