| 发明名称 |
TIMING SCRAMBLING METHOD AND TIMING CONTROL CIRCUIT THEREOF |
| 摘要 |
A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal. |
| 申请公布号 |
US2014160183(A1) |
申请公布日期 |
2014.06.12 |
| 申请号 |
US201314010502 |
申请日期 |
2013.08.26 |
| 申请人 |
NOVATEK Microelectronics Corp. |
发明人 |
Yang Shun-Hsun;Su Chia-Wei |
| 分类号 |
G09G3/36 |
主分类号 |
G09G3/36 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, the timing scrambling method comprising:
adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.
|
| 地址 |
Hsin-Chu TW |
