Pulse signal output circuit and shift register

摘要

A pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit are provided. A clock signal is supplied to one of transistors connected to a first output terminal. A power supply potential is applied to one of transistors connected to a second output terminal. Thus, power consumed by discharge and charge of the transistor included in the second output terminal can be reduced. Further, since a potential is supplied from a power source to the second output terminal, sufficient charge capability can be obtained.

主权项

1. A shift register comprising:
a first wiring; a second wiring; a third wiring; and a pulse signal output circuit electrically connected to the first, second, and third wirings, comprising:
a first transistor;a second transistor;a third transistor;a fourth transistor;a first input signal generation circuit; anda second input signal generation circuit, wherein a first terminal of the first transistor and a first terminal of the second transistor are electrically connected to each other to function as a first output terminal, wherein a first terminal of the third transistor and a first terminal of the fourth transistor are electrically connected to each other to function as a second output terminal, wherein a gate terminal of the first transistor, a gate terminal of the third transistor, and an output terminal of the first input signal generation circuit are electrically connected to each other, wherein a gate terminal of the second transistor, a gate terminal of the fourth transistor, and an output terminal of the second input signal generation circuit are electrically connected to each other, wherein a first clock signal is input to a second terminal of the first transistor, wherein a first potential is applied to a second terminal of the second transistor, wherein a second potential which is higher than the first potential is applied to a second terminal of the third transistor, wherein the first potential is applied to a second terminal of the fourth transistor, wherein at least a first pulse signal is input to the first input signal generation circuit, wherein at least a second clock signal is input to the second input signal generation circuit, and wherein a second pulse signal is output from one of the first output terminal and the second output terminal.