| 发明名称 |
2T and flash memory array |
| 摘要 |
Flash memory arrays are described. In one embodiment, a flash memory array includes memory sectors of Two-Transistor (2T) AND memory cells. Within each of the memory sectors, a row of sector selection transistors is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line, independent from the row of sector selection transistors. Other embodiments are also described. |
| 申请公布号 |
US8958248(B2) |
申请公布日期 |
2015.02.17 |
| 申请号 |
US201313827880 |
申请日期 |
2013.03.14 |
| 申请人 |
NXP B.V. |
发明人 |
van Duuren Michiel Jos;Storms Maurits Mario Nicolaas;van Bussel Erik Maria |
| 分类号 |
G11C16/04;G11C16/10;G11C11/56 |
主分类号 |
G11C16/04 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A flash memory array comprising:
a plurality of memory sectors of Two-Transistor (2T) AND memory cells, wherein within each of the memory sectors, a row of sector selection transistors is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line, independent from the row of sector selection transistors. |
| 地址 |
Eindhoven NL |
