发明名称 Illegal mode change handling
摘要 A data processing system 2 supporting multiple modes of operation is provided with illegal change detecting circuitry 22 which detects attempts by program instructions to perform an illegal change of mode, such as a change to a higher level of privilege in response to execution of a mode changing program instruction or an exception return instruction. If such a change is detected, then an illegal change bit CPSR.IL is set. An instruction decoder 12 is responsive to the illegal change bit having a set value to treat subsequent program instructions as undefined instructions. These undefined instructions may then trigger an undefined instruction exception or other type of response.
申请公布号 US8959318(B2) 申请公布日期 2015.02.17
申请号 US201113067808 申请日期 2011.06.28
申请人 ARM Limited 发明人 Grisenthwaite Richard Roy
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. An apparatus for processing data comprising: processing circuitry responsive to program instructions to perform data processing operations, said processing circuitry having a plurality of modes, said plurality of modes include at least one of a plurality of different instruction set modes, each instruction set mode corresponding to decoding and execution of program instructions from a different instruction set; and illegal change detecting circuitry responsive to an attempt to perform an illegal change of mode of said processing circuitry specified by an illegal program instruction: (i) to suppress said illegal change of mode; and (ii) to set an illegal change bit to a predetermined value indicative of said illegal program instruction attempting to perform said illegal change; wherein while said illegal change bit has said predetermined value, said processing circuitry responds to further program instructions as undefined instructions.
地址 Cambridge GB
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