Super-endurance solid-state drive with endurance translation layer (ETL) and diversion of temp files for reduced flash wear

摘要

A flash drive has increased endurance and longevity by reducing writes to flash. An Endurance Translation Layer (ETL) is created in a DRAM buffer and provides temporary storage to reduce flash wear. A Smart Storage Switch (SSS) controller assigns data-type bits when categorizing host accesses as paging files used by memory management, temporary files, File Allocation Table (FAT) and File Descriptor Block (FDB) entries, and user data files, using address ranges and file extensions read from FAT. Paging files and temporary files are never written to flash. Partial-page data is packed and sector mapped by sub-sector mapping tables that are pointed to by a unified mapping table that stores the data-type bits and pointers to data or tables in DRAM. Partial sectors are packed together to reduce DRAM usage and flash wear. A spare/swap area in DRAM reduces flash wear. Reference voltages are adjusted when error correction fails.

主权项

1. A super-endurance flash drive comprising:
a host interface for receiving host reads and host writes from a host; a dynamic-random-access memory (DRAM) buffer for storing data; a flash memory for storing data that is retained when power is lost, the flash memory being block-erasable and page-writeable; a controller for controlling access to the flash memory and to the DRAM buffer in response to host reads and host writes received by the host interface, the controller writing host data to the DRAM buffer; an Endurance Translation Layer (ETL) implemented in the DRAM buffer and controlled by the controller that uses the ETL to provide temporary storage to reduce flash wear; a data write cache stored in the DRAM buffer and managed by the controller; a Redundant Array of Individual Disks (RAID) structure of data distribution in the DRAM buffer for writing new data across several channels of the flash memory, the RAID structure managed by the controller; and a backup power supply for powering the DRAM buffer and the flash memory and the controller when power is lost, the backup power supply having a sufficient capacity for the controller to copy data in the ETL to the flash memory according to a policy; wherein the ETL implemented in the DRAM buffer comprises: a page mapping table stored in the DRAM buffer and accessed by the controller, the page mapping table having entries selected by a logical address from the host; a plurality of sub-sector mapping tables stored in the DRAM buffer and accessed by the controller, each sub-sector mapping table comprising a plurality of sector entries selected by a sector number within a page; wherein a sector entry comprises:
a partial-sector bit that indicates when the entry is a full-sector entry for a full sector of data for the host and when the entry is a partial-sector entry for a partial sector of data from the host;a page pointer that points to a page location in the DRAM buffer that stores the full sector of data or the partial sector of data;when the entry is a full-sector entry, a sector identifier that identifies a sector within the page location;when the entry is a partial-sector entry, a byte offset that identifies a starting byte location within the page location, and a length that indicates a length of the partial sector of data;wherein full-sector entries and partial-sector entries are stored in the plurality of sub-sector mapping tables; a data in buffer stored in the DRAM buffer and accessed by the controller; and wherein each page of the stripe-ready unit includes full page data or grouped partial page data; wherein the controller allows host write data to be stored in the data write cache, then a stripe-ready unit be written to the flash memory according to a policy.