发明名称 Semiconductor device with gate electrodes
摘要 A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.
申请公布号 US8963226(B2) 申请公布日期 2015.02.24
申请号 US201313970703 申请日期 2013.08.20
申请人 Renesas Electronics Corporation 发明人 Okazaki Tsutomu;Okada Daisuke;Nitta Kyoya;Tanaka Toshihiro;Kato Akira;Matsui Toshikazu;Ishii Yasushi;Hisamoto Digh;Yasui Kan
分类号 H01L29/768;H01L29/792;G11C16/04;H01L21/28;H01L27/02;H01L27/115;H01L29/423;H01L29/66 主分类号 H01L29/768
代理机构 Antonelli, Terry, Stout & Kraus, LLP. 代理人 Antonelli, Terry, Stout & Kraus, LLP.
主权项 1. A semiconductor device having a first memory cell and a second memory cell arranged in a first direction, wherein the first memory cell comprises: a first gate insulating film formed over a semiconductor substrate; a first gate electrode formed over the first gate insulating film; a second gate insulating film formed over the semiconductor substrate and over a side wall of the first gate electrode, and including a first charge storage film; a second gate electrode formed over the second gate insulating film, adjacent with the first gate electrode through the second gate insulating film; and a first impurity region formed in the semiconductor substrate and positioned on a second gate electrode side, wherein the second memory cell comprises: a third gate insulating film formed over the semiconductor substrate; a third gate electrode formed over the third gate insulating film; a fourth gate insulating film formed over the semiconductor substrate and over a side wall of the third gate electrode, and including a second charge storage film; a fourth gate electrode formed over the second gate insulating film, adjacent with the third gate electrode through the fourth gate insulating film; and the first impurity region positioned on a fourth gate electrode side, wherein the second gate electrode and the fourth gate electrode are formed in a sidewall form, wherein the first gate electrode, the second gate electrode, the third gate electrode and the fourth gate electrode extend in a second direction perpendicular to the first direction, wherein the second gate electrode has a first contact section extending toward the fourth gate electrode in the first direction, wherein the fourth gate electrode has a second contact section extending toward the second gate electrode in the first direction, and wherein the first contact section and the second contact section are shifted in the second direction, respectively.
地址 Kanagawa JP