Nitride semiconductor device and method for manufacturing same

摘要

According to one embodiment, a nitride semiconductor device includes a substrate; semiconductor stacked layers including a nitride semiconductor provided on the substrate, and having a buffer layer, a carrier running layer provided on the buffer layer, and a barrier layer provided on the carrier running layer; a source electrode and a drain electrode provided on the semiconductor stacked layers and in contact with the semiconductor stacked layers; and a gate electrode provided on the semiconductor stacked layers and provided between the source electrode and the drain electrode.;The gate electrode has a stacked structure, and a gate metal layer, a barrier metal layer, a first interconnection layer, and a second interconnection layer including Al are sequentially stacked from a side of a surface of the semiconductor stacked layers in the stacked structure.

主权项

1. A nitride semiconductor device comprising:
a substrate; semiconductor stacked layers comprising a nitride semiconductor provided on the substrate, and comprising a buffer layer, a carrier running layer provided on the buffer layer, and a barrier layer provided on the carrier running layer; a source electrode and a drain electrode provided on the semiconductor stacked layers and in contact with the semiconductor stacked layers; a gate insulating film provided on the semiconductor stacked layers; a surface passivation film provided on the gate insulating film; and a gate electrode provided on the gate insulating film and provided between the source electrode and the drain electrode, the gate electrode having a stacked structure, and a gate metal layer, a barrier metal layer, a first interconnection layer, and a second interconnection layer comprising Al being sequentially stacked from a top surface of the semiconductor stacked layers in the stacked structure, a portion of the gate electrode being provided in the surface passivation film, a portion of the barrier metal layer being provided between the first interconnection layer and the surface passivation film, a lower surface of the gate metal layer contacting to the gate insulating film, a first portion of a lower surface of the barrier metal layer contacting to the gate metal layer and a second portion of the lower surface of the barrier metal layer contacting to the surface passivation film.