| 发明名称 |
MEMORY ACCESS TIME TRACKING IN DUAL-RAIL SYSTEMS |
| 摘要 |
Disclosed are various apparatuses and methods for memory access time tracking in dual-rail systems. An apparatus may include a memory coupled to a first voltage rail and having a data output, a data circuit coupled to a second voltage rail and configured to receive the data output from the memory, and a timing circuit configured to adjust an access time of the memory based on a second voltage rail level. A method may include determining a voltage rail level of a data circuit, adjusting the access time of the memory based on the voltage rail level of the data circuit, outputting data from the memory, and receiving the output data by the data circuit. |
| 申请公布号 |
US2015067290(A1) |
申请公布日期 |
2015.03.05 |
| 申请号 |
US201314018399 |
申请日期 |
2013.09.04 |
| 申请人 |
QUALCOMM Incorporated |
发明人 |
CHABA Ritu;GANESAN Balachander;JUNG ChangHo;YOON Sei Seung |
| 分类号 |
G06F13/16 |
主分类号 |
G06F13/16 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a memory coupled to a first voltage rail, the memory having a data output; a data circuit coupled to a second voltage rail, the data circuit being configured to receive the data output from the memory; and a timing circuit configured to adjust an access time of the memory based on a second voltage rail level. |
| 地址 |
San Diego CA US |
