发明名称 |
ANALOG-TO-DIGITAL CONVERTER AND IMAGE SENSOR |
摘要 |
An analog-to-digital converter has a comparator to compare, within a predetermined period, an input signal with a ramp signal or with a triangle wave signal, a first counter to count up or down in accordance with a logic of a signal that indicates a comparison result of the comparator within the predetermined period, a count value storage to sequentially store count values of the first counter whenever the logic of the signal that indicates a comparison result of the comparator changes within the predetermined period, a second counter to count the number of times the logic of the signal that indicates a comparison result of the comparator changes, and an arithmetic module to output a value obtained by adding up the count values stored in the count value storage and dividing the added-up value by a count value of the second counter. |
申请公布号 |
US2015162929(A1) |
申请公布日期 |
2015.06.11 |
申请号 |
US201414561883 |
申请日期 |
2014.12.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SHINOZUKA Yasuhiro;FURUTA Masanori;SHIRAISHI Kei |
分类号 |
H03M1/12;H04N5/372;H03M1/18;H04N5/369;H03M1/34;H04N5/378;H04N5/3745 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
1. An analog-to-digital converter comprising:
a comparator to compare, within a predetermined period, an input signal with a ramp signal whose signal level monotonically increases or monotonically decreases with time, or with a triangle wave signal that alternately repeats monotonic increase and monotonic decrease with time; a first counter to count up or down in accordance with a logic of a signal that indicates a comparison result of the comparator within the predetermined period; a count value storage to sequentially store count values of the first counter whenever the logic of the signal that indicates a comparison result of the comparator changes within the predetermined period; a second counter to count the number of times the logic of the signal that indicates a comparison result of the comparator changes; and an arithmetic module to output a value obtained by adding up the count values stored in the count value storage and dividing the added-up value by a count value of the second counter, as an analog-to-digital conversion value of the input signal. |
地址 |
Minato-ku JP |