MODULAR EXPONENTIATION OPTIMIZATION FOR CRYPTOGRAPHIC SYSTEMS

摘要

A processing device, such as logic on an integrated circuit may identify a cryptographic message stored in a first register. The processing device may determine a plurality of components for a second power of the cryptographic message using a plurality of components of the cryptographic message. The processing device may determine the plurality of components for the second power of the cryptographic message without storing the entire second power of the cryptographic message. Further, the processing device may determine a third power of the cryptographic message using modular arithmetic. The processing device may determine the third power by transforming the plurality of components for the second power of the cryptographic message and the plurality of components of the cryptographic message.

主权项

1. A method comprising:
identifying, by logic on an integrated circuit, a cryptographic message stored in a first register; determining a plurality of components for a second power of the cryptographic message using a plurality of components of the cryptographic message, wherein the determining of the plurality of components for the second power of the cryptographic message is performed without storing the entire second power of the cryptographic message; and determining a third power of the cryptographic message using modular arithmetic, wherein said determining comprises transforming the plurality of components for the second power of the cryptographic message and the plurality of components of the cryptographic message, and wherein the plurality of components for the second power of the cryptographic message are determined without using modular arithmetic.