| 摘要 |
PROBLEM TO BE SOLVED: To prevent a communication between a hard disk and a CPU from being disabled by instantaneous interruption of a low voltage power source.SOLUTION: When a voltage of a low voltage power source becomes lower than a predetermined voltage, an effective value reduction detection circuit transmits a detecting signal to a main substrate. When the detecting signal is transmitted from the effective value reduction detection circuit, in the main substrate, a CPU stores a time t1 of the transmission into a flash memory. When the voltage of a low voltage power source 13 is recovered to a regular voltage (5 V), the CPU 10 stores a time t2 of the recovery and calculates a time T between the two times t1 and t2. If the calculated time T is in a range from a first time to a second time, the CPU operates a voltage switch to power on a hard disk again. If the calculated time is not in the range from the first time to the second time, the CPU does not power on the hard disk again and finishes processing as it is. |
