Semiconductor device integrating passive elements

摘要

The present invention provides a semiconductor device integrating passive elements, which applies to analog circuits, wherein capacitors, resistors and inductors are fabricated by a TVS technology. The semiconductor device comprises a substrate; at least one passive element arranged in the substrate; and at least one semiconductor integrated circuit formed in the substrate. The passive element includes a first conductive layer, a first dielectric layer and a second conductive layer, which are stacked sequentially. The first conductive layer and the second conductive layer cooperate with the first dielectric layer to form an equivalent element. The semiconductor circuit is electrically connected with the passive element through the first conductive layer and the second conductive layer to form bidirectional signal transmission paths. The passive elements can be formed on the back side of the substrate to reduce the area occupied by the passive elements in the substrate.

主权项

1. A semiconductor device integrating passive elements, applying to analog circuits and comprising
a substrate; at least one passive element arranged in said substrate and including
a first conductive layer formed in said substrate;a first dielectric layer formed on said first conductive layer; anda second conductive layer formed on said first dielectric layer, wherein said first conductive layer and said second conductive layer cooperate with said first dielectric layer to form an equivalent element; and at least one semiconductor integrated circuit (Integrated Circuit) formed in said substrate and electrically connected with said first conductive layer and said second conductive layer to form bidirectional signal transmission paths, and said first conductive layer, said first dielectric layer and said second conductive layer are annularly arranged from interior to exterior, and wherein said first conductive layer and said second conductive layer are annular conductive layers, and wherein said first dielectric layer has a shape matching said annular conductive layers, and at least one second annular hole and at least one first via are formed on a back side of said substrate by a Through Silicon Via (TSV) technology, and wherein said semiconductor integrated circuit is formed on a front side of said substrate, and wherein said passive element is arranged inside said second annular hole, and wherein a first conductive wire and a second conductive wire are respectively passed through said first vias to electrically connect said first conductive layer and said second conductive layer to said semiconductor IC.