Complementary metal oxide semiconductor circuit structure, preparation method thereof and display device

摘要

Provided are a CMOS circuit structure, a preparation method thereof and a display device, wherein a PMOS region in the CMOS circuit structure is of a LTPS TFT structure, that is, the PMOS semiconductor layer is prepared from a P type doped polysilicon material; an NMOS region is of an Oxide TFT structure, that is, the NMOS semiconductor layer is made of an oxide material; three doping processes applied to the NMOS region during the LTPS process may be omitted in the case in which the NMOS semiconductor layer in the NMOS region is made of an oxide material instead of the polysilicon material, which may simplify the preparation of the CMOS circuit structure as well as reduce a production cost. Furthermore, it is only required to crystallizing the PMOS semiconductor layer, which may also extend the lifespan of laser tube, contributing to reduction of the production cost.

主权项

1. A complementary metal oxide semiconductor CMOS circuit structure, having a PMOS region and an NMOS region, and comprising:
a base substrate; a PMOS semiconductor layer arranged on a portion of the base substrate; a gate insulating layer arranged on the PMOS semiconductor layer and on the base substrate; PMOS gate and NMOS gate arranged on different portions of the gate insulating layer; a first interlayer dielectric layer arranged on the PMOS gate and the NMOS gate and on the gate insulating layer; an NMOS semiconductor layer arranged on a portion of the first interlayer dielectric layer that corresponds to the NMOS gate;
a second interlayer dielectric layer arranged on the NMOS semiconductor layer and on the first interlayer dielectric layer; PMOS source/drain arranged on a portion of the second interlayer dielectric layer that corresponds to the PMOS semiconductor layer; and NMOS source/drain arranged on a portion of the second interlayer dielectric layer that corresponds to the NMOS semiconductor layer; wherein, the PMOS semiconductor layer, the PMOS gate and the PMOS source/drain are located within the PMOS region; and the PMOS semiconductor layer is prepared from a P type doped polysilicon material; the NMOS semiconductor layer, the NMOS gate and the NMOS source/drain are located within the NMOS region; and the NMOS semiconductor layer is made of an oxide material.