发明名称 |
Flip-flop circuit with resistive poly routing |
摘要 |
A latch circuit has a tri-state gate and a reverse tri-state gate that share the same complementary controls. The reverse tri-state gate locks an output of the tri-state gate when the tri-state gate is shut-off. The complementary control signals include a first undoped polysilicon strip. The output of the reverse tri-state gate may be coupled to the output of the tri-state gate via a second undoped polysilicon strip. |
申请公布号 |
US9148149(B2) |
申请公布日期 |
2015.09.29 |
申请号 |
US201414176025 |
申请日期 |
2014.02.07 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
Cheng Zhihong;Wang Peidong |
分类号 |
H03K3/289;H03K19/094;H03K3/3562 |
主分类号 |
H03K3/289 |
代理机构 |
|
代理人 |
Bergere Charles |
主权项 |
1. A latch circuit, comprising:
a tri-state gate having an input, an output, and receiving complementary control signals; a reverse tri-state gate having an input, an output, and sharing the complementary control signals with the tri-state gate, wherein the reverse tri-state gate is configured to lock an output of the tri-state gate when the tri-state gate is shut-off; a first undoped polysilicon strip for generating one of the complementary control signals; and a second undoped polysilicon strip coupled between the output of the tri-state gate and the output of the reverse tri-state gate. |
地址 |
Austin TX US |