Stress-controlled HEMT

摘要

A transistor device includes a heterostructure body having a source, a drain spaced apart from the source and a two-dimensional charge carrier gas channel between the source and the drain. The transistor device further includes a piezoelectric gate on the heterostructure body. The piezoelectric gate is operable to control the channel below the piezoelectric gate by increasing or decreasing a force applied to the heterostructure body responsive to a voltage applied to the piezoelectric gate.

主权项

1. A transistor device, comprising:
a heterostructure body including a source, a drain spaced apart from the source and a two-dimensional charge carrier gas channel between the source and the drain; and a piezoelectric gate on the heterostructure body and configured to control the channel below the piezoelectric gate such that:
(a) the two-dimensional charge carrier gas channel is uninterrupted below the piezoelectric gate absent a voltage applied to the piezoelectric gate; and(b) the piezoelectric gate generates a force in response to a voltage applied to the piezoelectric gate, the force being transferred to the heterostructure body to disrupt the two-dimensional charge carrier gas channel below the piezoelectric gate.