发明名称 |
Stacked microelectronic devices and methods for manufacturing stacked microelectronic devices |
摘要 |
Stacked microelectronic devices and methods of manufacturing stacked microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a plurality of electrically isolated, multi-tiered metal spacers on a front side of a first microelectronic die, and attaching a back-side surface of a second microelectronic die to individual metal spacers. In another embodiment, the method of manufacturing the microelectronic device may further include forming top-tier spacer elements on front-side wire bonds of the first die. |
申请公布号 |
US9147623(B2) |
申请公布日期 |
2015.09.29 |
申请号 |
US201414457000 |
申请日期 |
2014.08.11 |
申请人 |
Micron Technology, Inc. |
发明人 |
Lua Edmund Koon Tian;Leow See Hiong;Lee Choon Kuan |
分类号 |
H01L23/16;H01L23/00;H01L25/065;H01L21/50;H01L23/498;H01L25/00 |
主分类号 |
H01L23/16 |
代理机构 |
Perkins Coie LLP |
代理人 |
Perkins Coie LLP |
主权项 |
1. A method of manufacturing a microelectronic device, the method comprising:
attaching a first microelectronic die to a substrate, the first microelectronic die having a front-side surface facing away from the substrate, and a back-side surface facing the substrate; forming a plurality of first multi-tiered metal spacers on spacer sites at the front-side surface of the first microelectronic die, wherein each first multi-tiered metal spacer has a plurality of stacked spacer elements, and wherein at least one spacer element of the first multi-tiered metal spacers is wire-bonded to a corresponding top side bond pad on a substrate; forming a plurality of second multi-tiered metal spacers on the front-side surface of the first microelectronic die, wherein each second multi-tiered metal spacer has a plurality of stacked spacer elements, and wherein the second multi-tier metal spacers are attached to the spacer sites that are electrically isolated from integrated circuitry of the first microelectronic die; and attaching a back-side surface of a second microelectronic die to the first and second multi-tiered spacers. |
地址 |
Boise ID US |