发明名称 Management of bit line errors based on a stored set of data
摘要 The present disclosure includes systems and techniques relating to management of bit line errors based on a stored set of data. In some implementations, a system can include a device including non-volatile solid state memory and a memory controller. The memory controller can be configured to identify, from the solid state memory of the device, one or more bit line errors for the device upon power up of the system, construct a set of data corresponding to the one or more bit line errors for the device, store the set of data, at least in part, in the device, and, upon a subsequent power up of the system, identify the one or more bit line errors for the device from the stored set of data.
申请公布号 US9146824(B1) 申请公布日期 2015.09.29
申请号 US201213669359 申请日期 2012.11.05
申请人 Marvell International Ltd. 发明人 Chen Chih-Ching;Shin Hyunsuk;Lee Chi Kong;Au Siu-Hung Frederick;Park Jungil;Sun Fei
分类号 G06F11/22;G11C29/00 主分类号 G06F11/22
代理机构 代理人
主权项 1. A system comprising: a plurality of memory devices including non-volatile solid state memory; and a memory controller configured to: scan the non-volatile solid state memory of all of the plurality of memory devices to identify one or more bit line errors for the plurality of memory devices;construct a set of data corresponding to the identified one or more bit line errors for the plurality of memory devices;store multiple copies of the set of data in the non-volatile solid state memory of the plurality of memory devices prior to a power down of the plurality of memory devices; andupon power up of the plurality of memory devices that occurs subsequent to the power down prior to which the set of data is stored, retrieve the stored multiple copies of the set of data,perform a comparison of content of the retrieved copies of the set of data, anduse results of the comparison to reconstruct the set of data corresponding to the identified one or more bit line errors for the plurality of memory devices.
地址 Hamilton BM