MR enhancing layer (MREL) for spintronic devices

摘要

The performance of an MR device has been improved by inserting one or more Magneto-Resistance Enhancing Layers (MRELs) into approximately the center of one or more of the magnetic layers such as an inner pinned (AP1) layer, spin injection layer (SIL), field generation layer (FGL), and a free layer. An MREL is a layer of a low band gap, high electron mobility semiconductor such as ZnO or a semimetal such as Bi. The MREL may further comprise a first conductive layer that contacts a bottom surface of the semiconductor or semimetal layer, and a second conductive layer that contacts a top surface of the semiconductor or semimetal layer.

主权项

1. A magnetic read head, comprising:
an antiferromagnetic (AFM) pinning layer formed on, and contacting, a seed layer; an AP2 pinned layer formed on, and contacting, the AFM pinning layer; an AFM coupling layer formed on, and contacting, the AP2 layer; a ferromagnetic AP1 layer formed on, and contacting, the AFM coupling layer; a spacer layer formed on the ferromagnetic AP1 layer; a free layer formed on, and contacting, the spacer layer; and a capping layer over the free layer wherein at least one of the ferromagnetic AP1 layer and the free layer further comprise a magneto-resistance enhancing layer (MREL) comprising an n-type semiconductor (S) layer selected from a group consisting of semiconductors and semimetals to give a FM1/MREL1/FM2/spacer/free layer, AP1 layer/spacer/FL1/MREL2/FL2, or FM1/MREL1/FM2/spacer/FL1/MREL2/FL2 configuration where FM1 and FM2 are first and second portions of the ferromagnetic AP1 layer that contact bottom and top surfaces, respectively, of the first MREL (MREL1), and FL1 and FL2 are first and second portions of the free layer that contact bottom and top surfaces, respectively, of the second MREL (MREL2) and wherein one or both of the MREL1 and MREL2 further comprise a conductive layer in contact with at least one of a top surface and a bottom surface of the S layer to give a M1/S, S/M2, or M1/S/M2 configuration where M1 is a first conductive layer, and M2 is a second conductive layer.