Electronic device

摘要

This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.

主权项

1. An electronic device comprising a semiconductor memory, the semiconductor memory including:
a mat region configured to include a plurality of memory cells coupled with first wires; and a switching region configured to control coupling between the first wires and an external region in transfer of data stored in the memory cells, wherein the switching region includes: a substrate configured to include second active regions arranged in a first direction and extended in a second direction crossing the first direction; second gates extended in the first direction across the second active regions; second lower contacts disposed over the substrate on both sides of each second gate, each second lower contact configured to couple the second active regions arranged in the first direction; second upper contacts disposed over the second lower contacts, each second upper contact overlapping with a corresponding second active region on a first side of each second gate and overlapping with every second active regions on a second side of each second gate; second wires coupled with the second upper contacts on the first side of each second gate and the first wires and extended in the second direction; and third wires coupled with the second upper contacts on the second side of each second gate and an external region and extended in the second direction.