Using a single mask for various design configurations

摘要

Techniques and design methodologies for using a single mask set to create devices of different sizes are disclosed. A mask with a plurality of tiles is disclosed. Each of the tiles has a number of fixed resource blocks, multiple logic blocks and is surrounded by a scribe region. The tiles may be connected to one or more adjacent tiles through interconnect lines that enable the fixed resource blocks and logic blocks in one tile to communicate with the fixed resource and logic blocks in an adjacent tile. The mask set may be used to produce devices of different sizes. Using a mask set that can handle a variety of design sizes with varying resources may in turn reduce mask cost.

主权项

1. A method of manufacturing an integrated circuit (IC), comprising:
creating a plurality of tile patterns on a wafer, wherein each tile pattern has a plurality of fixed resources; creating a die seal surrounding the plurality of fixed resources, the die seal having an opening defined therein; connecting two or more adjacent tile patterns on the wafer through the opening; and cutting along a plurality of scribe lines on the wafer to form a plurality of ICs.