发明名称 |
Dual access for single port cache |
摘要 |
A method and system for accessing a single port multi-way cache includes an address multiplexer that simultaneously addresses a set of data and a set of program instructions in the multi-way cache. Duplicate output way multiplexers respectively select data and program instructions read from the cache responsive to the address multiplexer. |
申请公布号 |
US9146874(B2) |
申请公布日期 |
2015.09.29 |
申请号 |
US201012759927 |
申请日期 |
2010.04.14 |
申请人 |
Infineon Technologies AG |
发明人 |
Oberlaender Klaus |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
Eschweiler & Associates, LLC |
代理人 |
Eschweiler & Associates, LLC |
主权项 |
1. A system for accessing a multi-way cache formed of single port memory, the system comprising:
an address multiplexer that simultaneously addresses a line of data and a line of program instructions in the multi-way cache; a first duplicate output way multiplexer configured to select data read from the multi-way cache without selecting program instructions; and a second duplicate output way multiplexer configured to select program instructions read from the multi-way cache without selecting data. |
地址 |
Neubiberg DE |