Method of reducing system power with mixed cell memory array

摘要

A memory system, system including the memory system and method of reducing memory system power consumption. The memory system includes multiple memory units allocable to one of a number of processor units, e.g., processors or processor cores. A memory controller receives requests for memory from the processor units and allocates sufficient space from the memory to each requesting processor unit. Allocated memory can include some Single Level per Cell (SLC) memory units storing a single bit per cell and other memory units storing more than one bit per cell. Thus, two processor units may be assigned identical memory space, while half, or fewer, than the number of cells of one are assigned to the other.

主权项

1. A method of reducing memory system power consumption comprising:
providing a plurality of memory units in a common memory space shared by a plurality of requesting devices, said plurality of memory units comprising:
at least one performance memory unit storing a single bit per cell, said performance memory being provided for threads identified as performance critical, andat least one dense memory unit storing a selected number of n bits in each cell, such that each performance memory unit consumes at least n times as much power per bit as each of said dense memory units, storage class memory (SCM) being provided for data intensive threads; providing a memory controller allocating requested memory space in said plurality of memory units to a requesting device, said memory controller allocating dense memory and selectively including a performance memory portion, wherein for each request said memory controller allocates all dense memory, all performance memory, or a combination of dense memory and performance memory, wherein allocating performance memory comprises identifying thread performance requirements for each said requesting device and allocating dynamic random access memory (DRAM) for identified performance critical threads; and receiving a density indication from allocated memory with each memory access, said density indication indicating whether performance memory or dense memory is being accessed by a respective device.