| 摘要 |
PROBLEM TO BE SOLVED: To reduce discharging/charging current generated on a signal path from an input terminal to a latch circuit.SOLUTION: A semiconductor device comprises: plural latch circuits LT for latching each bit of an address signal according to a clock signal CK; input signal paths RIN for respectively connecting each address terminal 21 and the latch circuit LT; and plural clock paths RC for respectively connecting each clock input terminal 23 and latch circuit LT. Length of each input signal path RIN is substantially different, and length of each clock paths RC is substantially different, and lengths of the input signal path RIN and clock path RC corresponding to each latch circuit LT are substantially equal. Because latch operation is performed at different timings for every bit of the address signal, without isometry of the signal paths RIN, correct latch operation can be performed. |
