| 发明名称 |
Packaging for Eight-Socket One-Hop SMP Topology |
| 摘要 |
A mechanism is provided for packaging a multiple socket, one-hop symmetric multiprocessor topology. The mechanism connects each of a first plurality of processor modules to a first multiple-socket planar via a respective one of a first plurality of land grid array (LGA) connectors. The mechanism connects the first multiple-socket planar to a first side of a redistribution card via a second plurality of LGA connectors. The mechanism connects each of a second plurality of processor modules to a second multiple-socket planar via a respective one of a third plurality of LGA connectors. The mechanism connects the second multiple-socket planar to a second side of the redistribution card via a fourth plurality of LGA connectors. |
| 申请公布号 |
US2015271926(A1) |
申请公布日期 |
2015.09.24 |
| 申请号 |
US201514731815 |
申请日期 |
2015.06.05 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Colbert John L.;Dreps Daniel M.;Harvey Paul M.;Mandrekar Rohan U. |
| 分类号 |
H05K3/32;H05K7/10 |
主分类号 |
H05K3/32 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method, in a data processing system, for packaging a multiple socket, one-hop symmetric multiprocessor topology, the method comprising:
connecting each of a first plurality of processor modules to a first multiple-socket planar via a respective one of a first plurality of land grid array (LGA) connectors; connecting the first multiple-socket planar to a first side of a redistribution card via a second plurality of LGA connectors; connecting each of a second plurality of processor modules to a second multiple-socket planar via a respective one of a third plurality of LGA connectors; and connecting the second multiple-socket planar to a second side of the redistribution card via a fourth plurality of LGA connectors. |
| 地址 |
Armonk NY US |
