发明名称 METHOD OF FORMING SPLIT-GATE CELL FOR NON-VOLATIVE MEMORY DEVICES
摘要 Fabrication of a slim split gate cell and the resulting device are disclosed. Embodiments include forming a first gate on a substrate, the first gate having an upper surface and a hard-mask covering the upper surface, forming an interpoly isolation layer on side surfaces of the first gate and the hard-mask, forming a second gate on one side of the first gate, with an uppermost point of the second gate below the upper surface of the first gate, removing the hard-mask, forming spacers on exposed vertical surfaces, and forming a salicide on exposed surfaces of the first and second gates.
申请公布号 US2015270274(A1) 申请公布日期 2015.09.24
申请号 US201514732867 申请日期 2015.06.08
申请人 GLOBALFOUNDRIES Singapore Pte. Ltd. 发明人 CHEN Yu;LIU Huajun;CHWA Siow Lee;SIAH Soh Yun;SHAO Yanxia;LIM Yoke Leng
分类号 H01L27/115;H01L21/3213;H01L29/66;H01L21/033;H01L21/28;H01L29/423 主分类号 H01L27/115
代理机构 代理人
主权项 1. A device comprising: a first gate on a substrate, the first gate having an upper surface; an interpoly isolation layer or charge storage layer on side surfaces of the first gate and extending above the upper surface of the first gate; a second gate adjacent the interpoly isolation layer or charge storage layer on one side of the first gate, the second gate having a spacer shape and having an uppermost point of the second gate below the upper surface of the first gate; spacers formed on exposed vertical surfaces of the first and second gates and the interpoly isolation layer; and a salicide formed on exposed non-vertical surfaces of the first and second gates and the substrate, wherein an uppermost point of the interpoly isolation layer or charge storage layer on the first side is lower than an uppermost point of the second side and an uppermost point of the first gate is lower than the uppermost point of the interpoly isolation layer or charge storage layer on the first side.
地址 Singapore SG