发明名称 STACKED DIE INTEGRATED CIRCUIT
摘要 An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
申请公布号 WO2015143023(A1) 申请公布日期 2015.09.24
申请号 WO2015US21224 申请日期 2015.03.18
申请人 INVENSAS CORPORATION 发明人 WOYCHIK, CHARLES G.;UZOH, CYPRIAN EMEKA;ZHANG, RON;BUCKMINSTER, DANIEL;GAO, GUILIAN
分类号 H01L25/065;H01L23/498 主分类号 H01L25/065
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